Discussion on Decision Making and Problem Solving

Assignment – Decision Making and Problem Solving
No plagiarism.Write the reference in the last paper as APA style.You can find the guidelines in the file.Just for your Info.The textbook of this course is:

 

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College of Administrative and Financial Sciences

MGT 312

Assignment 3

Deadline: End of Week 12, 28/11/2020 @ 23:59

 

 

Course Name: Decision Making and Problem Solving Course Code: MGT 312
Student’s Name: Semester: I
Student’s ID Number: CRN:
Academic Year: 1440/1441 H

 

For Instructor’s Use only

Instructor’s Name:
Students’ Grade:  Marks Obtained/Out of Level of Marks: High/Middle/Low

Instructions – PLEASE READ THEM CAREFULLY

  • The Assignment must be submitted on Blackboard (WORD format only) via allocated folder.
  • Assignments submitted through email will not be accepted.
  • Students are advised to make their work clear and well presented, marks may be reduced for poor presentation. This includes filling your information on the cover page.
  • Students must mention question number clearly in their answer.
  • Late submission will NOT be accepted.
  • Avoid plagiarism, the work should be in your own words, copying from students or other resources without proper referencing will result in ZERO marks. No exceptions.
  • All answered must be typed using Times New Roman (size 12, double-spaced) No pictures containing text will be accepted and will be considered plagiarism).
  • Submissions without this cover page will NOT be accepted.

 

 

 

Course Learning Outcomes-Covered

  • Identify and analyze different perspectives on understanding problems for different situations. (3.1)
  • Utilize different decision making tools to enhance problem solving and decision making approaches.   (4.3)
  • Identify organized alternatives and select among possible alternative to evaluate business options. (2.10)
  • Create a Decision Making and Problem Solving worksheet document.  (4.5)

 

Critical Thinking Questions:                                                        (Marks 5)

 

Question 1:                                                                                     (1 Mark)

Suppose you are a member of a group asked to find ways to cut costs throughout your organization for the upcoming year. Sales have fallen sharply, and the company is in danger of going out of business. After gathering information, your group concludes that the company will save the most money by freezing pay for a year, despite a tradition of annual salary increases. How can you make sure this is a fair decision? How can you make sure that others in the organization will see it as a fair decision?

 

Question 2:        Case Analysis                                                      (2 Marks)

Care, a health consultancy company in Saudi Arabia, is studying the economic benefits of a program of preventative COVID-19 flu vaccinations. Care has to give advice to government for COVID-19 vaccination.  If vaccinations are not introduced then the estimated cost to the government if flu strikes in the next year is SR.70m with probability 0.1, SR.100m with probability 0.3 and SR.150m with probability 0.6. It is estimated that such a program will cost SR.70m and that the probability of flu striking in the next year is 0.75.

One alternative open to the committee is to institute an “early-warning” monitoring scheme (costing SR.30m) which will enable it to detect an outbreak of flu early and hence institute a rush vaccination program (costing SR.100m because of the need to vaccinate quickly before the outbreak spreads).

 Question

  • As a consultant of Care, Develop a decision tree for alternatives and make recommendation to Indian government that which alternative can maximize expected economic benefits?

 

Question 3:                                                                                     (1 Mark)

Decision support tools rely on objective, mathematical data. What part does ethics play in using decision support software?

 

Question 4:                                                                            (1 Mark)

If you collect too much information for analyzing a decision, you can suffer from analysis paralysis, where you spend too much time thinking about a decision rather than making one. Recall a major financial decision you made recently, such as of a car or housing purchase or rental. Describe your process for making the decision. How could analysis paralysis have affected this process?

 

 

 

[Please answer in the next page]

 

 

 

 

 

 

 

Answers

 

 

 

 

 

 

ELEC 340 Exam 1 Study Guide – 2020
Exam Details:
• Exam 1 is scheduled for Friday, October 2, 2020.
• The exam is closed books and closed notes.
• Exam is 55 minutes
• You may use a calculator unless otherwise noted for the problem. (Cell Phones are NEVER
permissible as calculators.)
• You are permitted to bring one side of an 8.5 x 11 sheet of paper with hand-written notes in
your handwriting with no photocopying or photoreduction.
• All solutions must be by method either taught in class or in the text and all work must be
shown for full credit.
General:
• All topics from class and lab are fair game for the exam.
• Problems can be derived from any examples done in class, any homework problem, or any
example in the covered text as well as from pre-lab and lab material.
Chapters Covered
Chapter 1 (Number systems)
Chapter 2 (Complete chapter)
Chapter 6 (Karnaugh Maps)
Labs Covered: 1-5
Exam Topics:
Number Systems
• Be familiar with unsigned binary and two’s complement binary
• Be able to convert between binary and decimal and decimal and binary without a calculator.
• Be able to convert between binary, hexadecimal, and Octal
• Be able to negate numbers by taking the 2’s complement of a number
• Know what Ascii is.
• Have a general understanding of binary number systems
• Be able to ADD unsigned binary numbers (required to complete lab 5)
Combinational Logic (Chapter 2)
• Be able to represent any function as a Boolean equation, a schematic or a truth table and be
able to go from one representation to another.
• Know DeMorgan
• Know Duality
• Know both methods for complementing a function
• Be able to apply and use Boolean laws.
• Know MINTERMS and MAXTERMS
• Be able to do SOP, POS, NAND-NAND, and NOR-NOR design and be able to go from one to
another.
Optimization (Chapter 6)
• Algebraic minimization
• Karnaugh Maps – Function Minimization 2,3, and 4 variable SOP
Not in Text
• Static Hazards (Glitches) – Know what glitches are and how to identify and resolve using a K-map
• Be able to do a POS design using k-map.
Lab Materials:
• Understand how to use discreet components to implement a logic function (SOP, POS, etc.)
• Be able to answer questions about the use of Vivado (and sequence of events)
• Know how to setup and use testbeds.
• Be familiar with VHDL to the extent covered in all labs.
• Be able to describe a function in VHDL using combinational representation
• Know the different data types (std_logic, std_logic_vector)
• Know how to code instantiation of multiple components.

 

 

ELEC 340 Exam 2 Study Guide 2020
Exam Details:
• Exam 2 is scheduled for Monday November 2, 2020.
• The exam is closed books and closed notes.
• Exam is 55 minutes
• You are permitted to use a calculator during the exam. (no cell phones)
• You are permitted to bring one side of an 8.5 x 11 sheet of paper with hand-written notes.
• All solutions must be by method either taught in class or in the text.
General:
• All topics from class and lab are fair game for the exam.
• Problems can be derived from any examples done in class, any homework problem, any lab, or
any example in the covered text.
• Pay particular attention to areas covered in detail in class and lab.
Chapters Covered
Chapter 3 – Sequential Logic Design
Labs Covered:
Lab 9 – D f/f
Lab 10 – Finite State Machine
Exam Topics:
Introduction to Sequential Logic
• Know what sequential logic is
• Know the difference between Synchronous and Asynchronous sequential logic
• Flip/Flops and Latches – Know what they are and what they do.
• NOTE: For the purpose of the exam, we will not use the textbook definition of Flip/Flop and
Latch. Devises will be described as either edge or level triggered, clocked or un-clocked.
o Be able to create state tables and state diagrams given a schematic
o Know SR, JK, T, and D types
o Know clocked versus un-clocked
o Know level versus Edge triggered
o Know Master-Servant design
o Be able to draw or interpret latch/FF timing.
• Know what an Oscillator or clock is.
Registers – Know what a register is and how it is used in Finite State Machines
Finite State Machine Design
Be able to develop a finite state machine from a word problem
Be able to interpret a finite state machine from the diagram
Be able to create a state (truth) table from either a word problem or given a FSM diagram.
Be able to reduce the state table using K-maps
Be able to draw combinational network and state registers (D flip/flops
Be able to reverse engineer a FSM
Be aware of common mistakes in FSM design
Non-exclusive transitions
Incomplete transitions
Be able to test for each type of mistake
FSM problems in the text 3.22-3.48
Know what non-ideal performance of F/F means
What is set-up time?
What is hold time?
VHDL – Code for a D f/f
Code for a Finite State Machine
Code for clocks, registers, incrementers, decrementers

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