Discussion on java assignment

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Project:

Get familiar with the low-level functionality in Android System. Examples of low-level features include Process management, File management, etc.

Requirements:

Develop an Android Application, which should use at least one type of OS-related functionality. An OS-related functionality is something related to the Android OS or a set of system calls. For example, you can develop a process manager to monitor the processes in the system. Some OS-related or system call APIs can be found at the following two links:

 

Project Topic Selection:

  • Process manager

– List current process (like the result of command ps in Ubuntu)

– Kill processes

Presentation and Demo guideline:

The project presentation & demo is the session where you will introduce your application and then show your working systems and demonstrate that your systems have the desired OS-level features as in the proposal. You can pre-record a video of your presentation and demo and play it during the live class. Or you can present and demo a live presentation during the class.

 

Below are the required slides for the presentation:

Slide 1: High level introduction of the app

Slide 2: overall design architecture of your application showing different components

Slide 3: OS-level functionalities description and APIs/System calls

Slide 4: Demo

You can use any kind of format in the demo slides, including but not limited to screenshots, video recordings of how your application work on the emulator or the smartphone, real-time demo on the phone, etc. The key is to show:

1: The application is working under a set of user interactions.

2: The application indeed has used/achieved some OS-level features.

Project Report:

 

The project report is the detailed summary of the entire project. The project report should include:

1: main body

2: source code

 

The main body should include the following sections:

1: Introduction:

Give introduction of your App: what functionalities it can achieve, how it will help users’ daily life, how it is related to OS-level functionalities, etc. This section should include no or minimal technical details.

2: Application Design:

  • Overall App design architecture and multiple building blocks of this architecture for different sub-functionalities.
  • Detailed description of each building block: how each building block works, what important APIs are used, how different APIs are connected, etc. The building blocks that you programmed and that involves OS-level features should be the focus and details are expected. For some standard building blocks, you may briefly mention it.

3: User Interface:

  • Explanation of user interface and screenshots of the app.

.

 

ECE301 Digital Design
Lab#10
Waveforms Generation
OBJECTIVE
To design a circuit for generation of arbitrary clock signals of positive and negative polarity.
To understand possible occurrence of delay, slower signal change, and noise on synthesized clock signal due to
potentially improper design and other factors.
Write a report.
PROCEDURE
In most digital systems there is a single central clock generating a square wave of high frequency. However,
complex computer systems require use of many different clock signals. Hence, these signals are generated using
the central clock signal. In general, secondary clock signals are of lower frequency, different shapes (ratio of time
of high voltage to time of low voltage), and different polarity (pulse up or pulse down).
1) Given JK FFs a T FF, implement a 3-bit binary counter in the following way:
FF inputs: T0 = 1
T1 = Q0
T2 = Q0 • Q1
2) Verify counter sequencing behavior using function generator signal connected to the CLK input of all three JK’
FFs.
3) Implement a ‘router’ using a multiplexer(74HC151).
4) Outputs Q0, Q1, and Q2 will be used as the selectors for the multiplexer.
5) Using inputs to the multiplexer (defined by switches and Vcc/GND connections), generate the following
complex waveforms of lower frequency synchronized with clock signal coming from the function generator (Fig
1).
To do that, first, the eight cycles of the clock signal needs to be separated into eight columns and labeled D0 to
D7 (Fig 2). Then, in each column, for each wave, the current state of the wave should be mentioned(either a 0
or a 1). Afterwards, each column should be evaluated. If the column have all 1s, then the input would be VCC.
If the column have all 0s, then the input would go to ground. If the input went 011 from top to bottom, then
the input would come from switch 1. If the input went from 001 from top to bottom, then the input would
come from switch 2. This can be seen below in Fig 2.
Fig 1
Fig: 2
Fig: 3
6) Verify your design using oscilloscope (logic analyzer) displaying signal generator clock and waveforms you
designed.
REPORT
Write a report.
Your report must include: all designs, and screen shots of waveforms generated.

 

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