LAB ASSIGNMENT 1
Plotting IDS-VGS Characteristics of NMOS and PMOS:
1. IDS-VGS characteristics of NMOS can be obtained using the circuit shown in Fig. 1 (a).
Choose W & L appropriately, use VDS= 1 V & VGS= 1 V.
2. After implementing the circuit, remember to check and save the design.
3. Now, go to Launch â†’ ADE L â†’ Setup and select Simulator, Model Files
4. To obtain IDS-VGS characteristics, go to Analysis in ADE L window â†’ Select Trans and
use Start time equal to 0, Stop time of 10 ns and step size of 10 ps.
5. Go to dc â†’ click on Select Source â†’ click on DC source connected to Gate terminal
and Start Value is 0 V , Stop Value is 1 V, & step size is 0.001.
6. Go to Outputs in ADE L window â†’ To be plotted â†’ Select on Schematic and click
Drain Node of the device.
7. Repeat the above procedure to for obtaining IDS-VGS characteristics of PMOS using Fig. 1
(b) [Note: VGS will be a negative quantity for PMOS device] [Use VG=0 V, VS= 1 V, &
8. Plot IDS-VGS characteristics of NMOS and IDS-VGS characteristics of PMOS in the report.
Determining VTH :
1. For NMOS device, VTH is defined as the value of VGS at which IDS is equal 300 nA â¨¯
Fig 1: IDS-VGS Characterization Circuit (a) NMOS & (b) PMOS
VGS VDS VG VS VD
2. For PMOS device, VTH is defined as the value of VGS at which IDS is equal 70 nA â¨¯
(W/L) [Note: VTH of a PMOS device should be negative]
a. Impact of Body Bias
i. Determine VBS which results in +/- 5% change in the VTH of NMOS using
circuit in Fig. 2 (a).
ii. Determine VBS which results in +/- 5% change in the VTH of PMOS using
circuit in Fig. 2 (b).
b. Impact of Temperature Variation
i. Determine VTH of NMOS and PMOS devices by varying temperature from 0O C
to 90O C.
ii. Plot VTH vs Temperature for NMOS and PMOS devices in the report & complete
the table below
O C 30O C 60O C 90O C
c. Impact of VDS Variation
Fig 2: IDS-VGS Characterization Circuit (a) NMOS & (b) PMOS, with Body Bias
VGS VDS VB VG VS VD VB
i. Determine VTH of NMOS and PMOS devices by varying VDS from 0 V to
1 V in steps of 0.2 V.
ii. Plot VTH vs VDS for NMOS and PMOS devices in the report & complete
the table below
Particulars VDS =0 V VDS =0.2 V VDS =0.4 V VDS =0.6 V VDS =0.8 V VDS =1 V
d. Impact of Channel Length Variation
i. Determine VTH of NMOS and PMOS devices by varying LCH from 45 nm
to 180 nm in steps of 45 nm [Use W=200 nm].
ii. Plot VTH vs LCH for NMOS and PMOS devices in the report & complete
the table below
Particulars LCH =45
LCH =90 nm LCH =135
Summarize key take away points from the above simulations results.
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